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Desktop CPU Guide

Page 9 of 11

Apple and Cyrix CPUs

Apple/IBM PowerPC G5
Apple PowerPC G4 (Motorola 7451)
Apple PowerPC G4 (Motorola 7450)
Apple PowerPC G4 (Motorola 7400/7410)
Apple PowerPC G3
Cyrix MII

Apple Processors

Apple/IBM PowerPC G5 - On June 23, 2003 Apple announced the Power Mac G5. The Power Mac G5 is powered by the new 64-bit PowerPC G5 processor which was jointly developed by Apple and IBM. Power Mac G5s are currently available at speeds of 1.6GHz, 1.8GHz, and dual processor models at 2GHz.

Per Apple, the key features of the PowerPC G5 include:

o 64-bit architecture, capable of addressing
18 exabytes of memory
o Clock speeds up to 2GHz
o 1GHz frontside bus for throughput of up to
8 GBps per processor
o Dual independent 1GHz frontside buses in
dual processor systems
o Superscalar execution core supporting up to
215 in-flight instructions
o Velocity Engine for accelerated single instruction,
multiple-data (SIMD) processing
o Two double-precision floating-point units
for high-speed advanced computation
o Massive three-component branch prediction
logic to increase processing efficiency
o Native compatibility with existing 32-bit
application code

Apple has test data that shows the 2 GHz G5 is faster than a 3 GHz Pentium 4 or a 3.06 GHz Xeon.

Apple PowerPC G4 (Motorola 7451) - Available from Apple at speeds of 800, 867, 933, 1000, 1250, and 1042 MHz.
Per Motorola, "The MPC7451 processor has separate 32KB, physically addressed instruction and data caches. Both L1 caches feature cache way locking and are eight-way set associative. For greater speed, the L2 cache has been integrated on-chip with a 256-bit interface to L1 which operates at processor frequency. This L2 is 256KB eight-way set associative. L2 cache access is fully pipelined.

"The MPC7451 also supports an L3 cache interface with on-chip tags to support up to 2MB of off-chip cache. The L3 data bus is 64-bits wide, provides multiple SRAM options, and affords critical quad-word forwarding to reduce latency. The off-chip L3 storage can also be configured as a local addressable memory. Finally, in addition to supporting hardware table searching on a TLB miss, the MPC7451 can be configured for software table searching. In this case, TLB entries are loaded by the system software.

"The MPC7451 processor contains separate memory management units for instructions and data, supporting 4 Petabytes (252) of virtual memory and up to 64 Gigabytes (236) of physical memory. The MPC7451 also has four instruction block address translation and four data block address translation registers."

Apple PowerPC G4 - Older G4s and New Imac (Motorola 7450) Per Motorola, "Designed at Motorola's Austin, Texas technology center, the MPC7450 microprocessor has an advanced, deeper, seven-stage pipeline with two additional execution units, and an enhanced AltiVec engine. The L2 cache has been integrated onto the die for greater speed, and a 256-bit datapath to the L1 cache has been implemented. The MPC7450 processor also supports a large backside L3 cache with a 64-bit datapath, and provides multiple SRAM options.

"Additionally, the MPC7450 microprocessor implements Motorola's high-bandwidth MPX system bus, capable of achieving sustained bandwidth performance of 1064 MB/sec. which can provide up to 5 times the bus performance over G3 generation processors.

" The AltiVec vector processing engine has been expanded to dispatch two instructions to any of the four AltiVec execution units per clock cycle. This enhancement greatly improves vector instructions per clock performance. Software can also be optimized to utilize the MPC7450 microprocessor's AltiVec technology to enhance performance.

"The MPC7450 PowerPC microprocessor is manufactured in the HiPerMOS 6 (HiP6) 0.18-micron copper fabrication process technology, and features a low-power design with three power-saving user-programmable modes - nap, doze (with bus snoop) and sleep - which reduce the power drawn by the processor. "

Power Mac G4 and New Imac (Motorola 7450)
- 466, 533, 667, 733, 800 MHz PowerPC G4 processors with up to 256K of Full-Speed level 2 cache and 1MB of half speed level 3 backside cache on some configurations
- high performance 133 MHz system bus with over one gigabyte-per-second of system throughput, with 128 to 256MB of DRAM expandable to 1.5GB
- four high-performance 64-bit 33 MHz PCI slots with write-combining to provide up to 215 megabyte-per-second of sustained throughput—double that of previous generations

Apple PowerPC G4 (Motorola 7400/7410) - The older Apple PowerPC G4 (Motorola 7400/7410) was found in the Power Mac at speeds of 400, 450, and 500 (Power Macs sold prior to Apple's introduction of the faster G4s (Motorola 7450) on January 9, 2001). Its specs include: Velocity Engine vector processing unit with 162 integrated Single Instruction Multiple Data (SIMD) instructions, full 128-bit internal memory data paths, new floating-point unit supporting single-cycle, double-precision calculations, data stream prefetching operations supporting four simultaneous 32-bit data streams, 1MB backside level 2 cache running at half the processor speed, and 100-MHz system bus supporting up to 800-MBps data throughput.

Apple PowerPC G3 - The Apple PowerPC G3 is found in the Apple iMac, iMacDV, iMacDV+, and iMacDV Special Edition. Its specs include: 350, 400, 450, MHz PowerPC G3 processor, 512K backside level 2 cache, 100MHz system bus, 64MB or 128MB of PC100 SDRAM (3.3-volt, 64-bit wide, 168-pin, running at 100 MHz); two DIMM slots support up to 512MB using 64MB, 128MB, or 256MB DIMMs.



VIA Technologies, Inc. on June 6, 2000 announced the introduction of a new version of the VIA Cyrix™ III processor running at speeds ranging from 533MHz to 667MHz.
The new VIA Cyrix® III processor was designed by VIA's Centaur Technology team located in Austin, Texas, and is manufactured using an advanced 0.18 micron process. With a die size of only 76mm2, the new VIA Cyrix® III processor minimizes power consumption to less than 10 watts, making it an ideal solution for fanless desktop designs as well as maximizing battery life in mobile devices. This new CPU is compatible with Intel's Socket 370 interface.
Available at speeds ranging from 533MHz to 667MHz, the new VIA Cyrix® III processor also features a large and highly efficient 128KB Level 1 cache, a high-speed 100MHz/133MHz Front Side Bus, and support for enhanced 3DNow! technology.
The VIA Cyrix® III processor is in production using a 0.18 micron, 6-layer process.

InfoHQ Comment. From the specs of this chip, it is in the same class as the AMD K6-2 and Intel Celeron. Whether it is faster or slower than these CPUs, largely depends on the speed of its floating point unit. The lack of L2 cache isn't a good performance indicator, however it does keep cost and heat down.
It appears that Cyrix hopes to aim this CPU at the low power/notebook market, and that is probably where it will have its best chance at success.

Cyrix MII

(Socket 7 motherboard). According to Cyrix, their MII (300-433 MHz) runs faster than an equivalent Intel Celeron without cache. This chip does not have 3D instructions and is slower than AMD's K6-2, Intel's Pentium II, Pentium III, and Celerons (with cache) at equivalent CPU speeds. <Cyrix uses a performance rating (PR) to show their CPUs speed as an equivalent to an Intel CPU, the PR speed is not the actual speed of the CPU>
VIA Technologies purchased Cyrix from National Semiconductor on August 3. Soon thereafter, IDT's Winchip Division was purchased.

Cyrix MII
(Photo Courtesy of National Semiconductor Corporation)
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